DeepSeek Moves Into Chip Design to Beat Export Controls
DeepSeek is developing its own inference chip, confirmed by Reuters sources - the first semiconductor project in the lab's history, driven by US export controls that cut off China from Nvidia hardware and HBM memory.

High-bandwidth memory for AI inference chips ships from exactly three places: SK Hynix in Icheon, Micron in Boise, and Samsung in Hwaseong. All three are off-limits to Chinese chip designers under current US export controls. The logic nodes needed to manufacture a competitive inference ASIC - TSMC's N3 and N2 processes - are likewise blocked. SMIC's 7nm node is available but produces at tens of thousands of wafers per month versus the hundreds of thousands TSMC sustains on equivalent nodes. For a lab running inference at DeepSeek's scale, that math is the ceiling. Reuters reported Tuesday that DeepSeek has decided to build its way through it.
TL;DR
- DeepSeek is developing its own AI chip focused on inference - its first internal semiconductor project, confirmed by three Reuters sources
- The effort started around mid-2025 and remains early-stage; the company has grown its chip engineering team quietly, with no public job postings
- US export controls block Chinese labs from Nvidia's top-tier GPUs and from SK Hynix, Micron, and Samsung HBM stacks - the two components that define competitive inference chip design
- OpenAI shipped Jalapeño with Broadcom in June on TSMC's N3 node; Anthropic is in talks with Samsung over 2nm custom silicon - both chip programs depend on foundry access DeepSeek cannot reproduce
- Nvidia shares dropped ~2% in premarket trading on the news; Huawei, which holds roughly 50% of China's $50B domestic AI accelerator market, faces a potential long-term competitor
The Constraint That Triggered the Decision
DeepSeek has been running on workarounds since the first round of US export controls in 2022 restricted access to Nvidia's H100. The Blackwell ban tightened that further. Where US labs buy high-end Nvidia GPUs off the shelf for both training and inference, DeepSeek has had to engineer around what's available - first the H800, then Huawei Ascend clusters.
The inference problem is structurally different from training. Training runs can be batched, parallelized across weeks, and scheduled around hardware limitations. Inference is continuous and synchronous: every query needs an answer at latency users can tolerate. At long context lengths - DeepSeek's V4 supports 1M tokens - memory bandwidth becomes the binding constraint, and Huawei's Ascend hardware doesn't carry HBM3e. Its LPDDR-class memory delivers roughly 60% of H100 inference throughput, which limits what DeepSeek can serve economically at scale.
That specific gap appears to be what pushed the chip project into motion roughly a year ago.
Silicon wafer production at scale requires N3/N2 process nodes - currently inaccessible to Chinese chip designers.
Source: unsplash.com
Where the Supply Chain Breaks
The bottleneck stacks at every layer of chip manufacturing, not just one.
Logic nodes
TSMC's N3 process, which OpenAI used for Jalapeño, and the forthcoming N2 are blocked from Chinese customers by US controls enforced at TSMC's end. SMIC's best available process is 7nm - competitive in isolation, but running at a fraction of TSMC's volume capacity. Designing a chip for SMIC 7nm means accepting constrained supply before the chip even enters production.
High-bandwidth memory
HBM is what separates modern AI accelerators from general-purpose silicon. SK Hynix, Micron, and Samsung produce basically all HBM3e in the world. US rules bar sales to Chinese chip designers. Huawei's Ascend 910C substitutes a proprietary LPDDR-class memory that trades bandwidth for availability - enough for short-context inference, a bottleneck on anything longer.
Huawei's upcoming Ascend 950 series will use in-house HBM, rated at 1.6 TB/s on the 950PR and up to 4 TB/s on the 950DT. Those are competitive numbers on paper. But Huawei's HBM is built at SMIC, not at SK Hynix, and the manufacturing yields and volume ramp remain unproven at production scale.
Advanced packaging
Integrating HBM stacks onto a logic die uses CoWoS packaging, a technology TSMC dominates. Even if SMIC produced a competitive logic die, assembling it with HBM would still require packaging infrastructure that Chinese foundries haven't reproduced at volume. Three constraints compound each other. DeepSeek's chip effort faces all three simultaneously.
| Compute Source | Available to Chinese Labs | Inference vs H100 | HBM Access |
|---|---|---|---|
| Nvidia H100 / H200 | Blocked (2022 controls) | Baseline | HBM3e |
| Nvidia H20 | Severely restricted (2025) | ~40-60% | Limited |
| Huawei Ascend 910C | Available | ~60% | LPDDR-class, not HBM3e |
| Huawei Ascend 950PR | Late 2026 | ~80-90% projected | In-house HBM, 1.6 TB/s |
| SMIC 7nm custom ASIC | Available, limited scale | Design-dependent | Requires separate sourcing |
| DeepSeek custom chip | In development | Unknown | China-domestic supply, uncertain |
Who Gets Squeezed
DeepSeek and other Chinese AI labs
DeepSeek isn't alone in this position - every Chinese AI lab running inference at scale hits the same wall. Baidu, Moonshot AI, Zhipu, and ByteDance already run production inference on Huawei Ascend clusters, accepting the performance gap in exchange for supply security. What makes DeepSeek's situation different is that it has demonstrated enough engineering efficiency to make constrained hardware workable. Its first external funding round - reported at $7B with a $52-59B valuation - creates a path to fund serious chip development.
The company's chip effort will need it. Designing a competitive inference chip from scratch, recruiting a team quietly and without public job postings, while simultaneously running production AI services isn't a small undertaking.
Huawei
Huawei currently controls roughly half of China's $50B domestic AI accelerator market, with Cambricon (14%), Kunlun (5%), and T-Head (5%) taking most of the rest. A DeepSeek chip optimized for DeepSeek's own serving patterns wouldn't initially threaten Huawei's position with other Chinese labs - but it could eliminate Huawei hardware from DeepSeek's own stack, and potentially become a reference design others study.
Huawei's Ascend lineup is built for general use, not for the specific memory access patterns of a 1M-context MoE model. That specificity is exactly what a custom chip can exploit.
Chinese AI labs are spending an estimated 30-40% more on domestic inference hardware than Nvidia-equivalent costs would be at open-market rates.
Source: unsplash.com
Chinese cloud providers
Alibaba Cloud, Tencent Cloud, and ByteDance Volcano Engine are all spending above open-market rates for inference compute. Domestic chip pricing reportedly runs 30-40% above what equivalent Nvidia hardware would cost in an uncontrolled market. That premium flows to Huawei. A competitive domestic alternative - even a purpose-built one like DeepSeek's - creates pricing pressure the current market structure doesn't have.
What Breaks First
Long-context serving is the most visible stress point. DeepSeek's V4 runs a 1M-token context window, and at those lengths, memory bandwidth is the limiting factor on throughput. Huawei's LPDDR memory architecture saturates at long context in ways that HBM3e doesn't. This is the workload a DeepSeek-designed chip would be optimized around from day one.
Training timelines are a secondary concern. DeepSeek has shown it can train competitive models on available hardware through algorithmic efficiency. Inference can't be compressed the same way - it has to be served, continuously, at production volume.
"DeepSeek is reaching out to external partners and holding discussions with chip-design, foundry and memory companies," according to three people familiar with the matter, speaking to Reuters on condition of anonymity.
The fact that talks are happening with memory companies specifically suggests DeepSeek is exploring whether China-domestic HBM supply (via Huawei's manufacturing chain or other sources) can be secured independently of the standard SK Hynix/Micron/Samsung path. That's the most ambitious part of the effort and the hardest technical hurdle.
What Comes Next
Designing a competitive inference chip under normal conditions takes three to five years and hundreds of millions in capital. DeepSeek's $7B funding round provides runway. But the constraint isn't money - it's foundry access and HBM. OpenAI's Jalapeño reached tape-out in nine months with Broadcom's support and TSMC's N3 process. Anthropic has Samsung's 2nm roadmap and an $19B capacity commitment behind its program. DeepSeek will be building for the hardware environment that exists - SMIC 7nm, uncertain HBM sourcing - rather than the one its engineers would choose. Unless export control policy shifts, the gap between what DeepSeek can build and what its US competitors can buy will be structural, not just a matter of time and money.
Nvidia's 2% premarket drop on the Reuters report suggests markets see DeepSeek's chip program as a future revenue risk. In the near term, Nvidia has nothing to worry about from a chip that doesn't exist yet. The more immediate signal is that the world's most efficient AI lab no longer thinks the constraint is something it can engineer around in software.
Sources:
- Exclusive: China's DeepSeek developing its own AI chip, sources say (Reuters)
- OpenAI unveils its first custom chip, built by Broadcom (TechCrunch)
- Huawei Ascend 950 AI Accelerator Pictured (TechPowerUp)
- Huawei Ascend AI Chip Roadmap & System level performance data (Convequity)
- Morgan Stanley 2026 Semiconductor Report (PANews)
