AMD Pushes P100 Embedded to 12 Cores and 80 TOPS

AMD quietly dropped six new processors on Monday that close a significant gap in its embedded lineup - the company is adding 8, 10, and 12-core variants to the Ryzen AI Embedded P100 family it launched in January, pushing the ceiling to 80 system TOPS and formally bringing Strix Point silicon into the industrial market.

The new chips are sampling now. Production starts in July.

What AMD Announced

The Six New SKUs

Three commercial parts (P164, P174, P185) and three industrial-grade variants (P164i, P174i, P185i). The -i suffix buys you operation down to -40°C and 24/7 duty cycles with 10-year product lifetime guarantees - the standard requirements for factory-floor and medical deployments.

Core configurations don't scale linearly in the way you might expect. The 8-core P164 runs four Zen 5 and four Zen 5c cores. The 12-core P185 tops out at four Zen 5 and eight Zen 5c cores. AMD is reusing Strix Point silicon already proven in its consumer laptop lineup, then hardening it for the industrial temperature range. That's a sensible approach for a product line that needs multi-year supply guarantees.

Physical Specs and Thermals

All six chips share a 28W nominal TDP with a configurable range of 15 to 54 watts. The BGA form factor stays at 25 x 40 mm, matching the footprint of the 4-6 core models announced in January - meaning existing board designs can drop in a higher-core variant without a PCB respin, which matters a lot to industrial OEMs.

Non-automotive SKUs get dual USB4 ports and 16 lanes of PCIe Gen 4. That gives you enough bandwidth to attach external accelerators or high-speed storage with the on-die AI compute.

Under the Hood

CPU Architecture: Zen 5 Hybrid

The hybrid Zen 5 + Zen 5c layout is a tradeoff AMD has been making across its embedded and mobile lines. Zen 5 cores are the full-fat variant - larger, faster on per-thread workloads. Zen 5c ("compact") cores are smaller and more power-efficient, aimed at sustained throughput tasks that don't need single-thread speed.

For industrial AI inference, where you're running multiple parallel pipelines - object detection, anomaly detection, and sensor fusion simultaneously - the Zen 5c cores handle background coordination work while Zen 5 cores manage latency-sensitive control loops. It's a reasonable split for the target use case.

AMD says the new parts deliver 39% higher multithreaded performance over the prior-gen Ryzen Embedded 8000 series, and 2.1x the total system TOPS. That's a significant jump for customers upgrading aging industrial PCs.

GPU and NPU Stack

The RDNA 3.5 integrated GPU scales with core count: 12 compute units on the 8-core P164, 14 on the P174, 16 on the top P185. AMD has ROCm certification for the RDNA 3.5 GPU, which means developers can run open-source AI frameworks against it without proprietary driver wrappers:

# Check ROCm device visibility on P185-based system
rocm-smi --showid

# Run llama.cpp with ROCm backend for on-device inference
./llama-server \
  --model ./models/mistral-7b-q4.gguf \
  --n-gpu-layers 32 \
  --host 0.0.0.0 \
  --port 8080

The XDNA 2 NPU handles the low-latency inference path - image classification, predictive maintenance models, and the kind of always-on sensor processing that can't tolerate the latency of a GPU round-trip. The NPU stays active at very low power while the rest of the chip idles.

ROCm support also opens the door to running quantized local models directly on embedded hardware. We've covered how to run open-source LLMs locally on consumer hardware; the same workflow applies here once ROCm device support is confirmed on production silicon.

AMD has also certified the platform for Xen hypervisor-based virtualization, enabling Linux, Windows, and RTOS environments to coexist on the same chip - a common pattern in automotive infotainment where a safety-certified RTOS and a rich-OS UI layer need to share one SoC.

Ecosystem and Target Markets

Industrial Automation

The industrial control market moves slowly and demands long supply horizons. AMD is positioning these chips against Intel's Atom-class and Core Ultra embedded parts. The P100 expansion gives system integrators a single platform that scales from the 4-core P121 (30 TOPS, 15-28W) up to the 12-core P185 (80 system TOPS, up to 54W), all with the same BGA footprint and pin compatibility.

Kontron, one of the larger industrial compute module vendors, confirmed board support at launch. "The AMD Ryzen AI Embedded platform is a game changer for industrial and AI-driven applications at the edge. Our P100-based mITX will be equipped with four-core to 12-core APUs allowing us to offer customers an array of solutions," said Thomas Stanik, senior sales and business development manager at Kontron.

Physical AI and Robotics

Physical AI workloads - including mobile robotics and humanoid systems - are a key target for the higher-core P100 variants. Source: pexels.com

AMD is explicitly targeting what it calls "physical AI" - mobile robots, humanoid platforms, and autonomous industrial vehicles. These applications need local inference (no cloud dependency for safety-critical decisions), multimodal sensor fusion (cameras, lidar, force sensors), and real-time control loops running in parallel.

The 80 system TOPS ceiling isn't going to challenge a discrete GPU, but for a 28W embedded chip running in a mobile robot on a battery budget, it's a meaningful number. Advantech and congatec both announced P100-based compute modules, expanding the available board ecosystem.

Factory automation is the core volume market for the P100 series, where -40°C ratings and 10-year supply guarantees matter more than raw TOPS. Source: pexels.com

The X100 series - featuring up to 16 cores from Strix Halo silicon - is slated for the second half of 2026 and will push further up the performance stack for more demanding robotic and imaging deployments.

Requirements and Compatibility

For context, AMD announced the desktop sibling - the Ryzen AI 400 series with 50 TOPS NPU - just last week, targeting Copilot+ PCs on AM5. The embedded P100 and desktop Ryzen AI 400 share XDNA 2 NPU silicon but serve different markets completely: consumer desktops vs. industrial deployments with decade-long supply requirements.

Where It Falls Short

AMD isn't publishing specific TOPS numbers for individual P164/P174/P185 SKUs - just the ceiling of 80 for the top part. That makes it harder to compare directly against Intel's Lunar Lake-based embedded parts or Qualcomm's Snapdragon X-series industrial variants, both of which have more granular public specs.

Production silicon doesn't arrive until July, and reference development boards land in H2 2026. That's a long wait from announcement to something you can actually run software on. Industrial customers usually need 12-18 months of board-level development time anyway, but it means the "sampling now" headline overstates how close to real deployments this actually is.

The 80 system TOPS metric also bundles NPU, GPU, and CPU compute together in ways that aren't always useful for capacity planning. A manufacturing vision system that needs to run a 7B-parameter model continuously will care about sustained NPU throughput, not the combined peak number. AMD hasn't released those granular figures yet.

The expansion fills a real gap. The 4-6 core P100 parts from January topped out at 50 TOPS NPU - enough for simple classification tasks but thin for more complex multi-modal pipelines. The 12-core P185 gives OEMs headroom to deploy more capable models as inference costs drop. Whether the actual production silicon delivers on the paper specs is the question that won't be answered until Q3.

Sources:

• AMD Expands Ryzen AI Embedded P100 for Edge AI (AMD Blog)
• AMD Expands Ryzen AI Embedded P100 Family With 8 to 12 Core Parts (ServeTheHome)
• AMD is giving its embedded chips 80 TOPS of AI compute (Techzine Global)
• AMD Formally Launches Ryzen AI Embedded P100 Series 8-12 Core Models (Phoronix)
• AMD launches Ryzen AI Embedded P100 and X100 processors (CNX Software)
• AMD Introduces Ryzen AI Embedded Processor Portfolio (AMD Newsroom, Jan 2026)